Vertical power semiconductor devices control a load current flow between a first load electrode at a front side and a second load electrode on the back of a semiconductor die. In the off state, a blocking voltage drops vertically across the semiconductor die between the first load electrode at the front side and the second load electrode on the back and drops laterally across a termination region between an active region and a doped edge region that is formed along the lateral surface of the semiconductor die and that is connected to the electric potential of the second load electrode. Power semiconductor devices may include multi-zone junction termination extensions with outwardly decreasing dopant concentration or floating guard rings around the central region in order to shape the electric field in the termination region in a way that avoids field crowding along the front side. For semiconductor materials with low diffusion coefficients formation of robust multi-zone junction termination structures and guard rings is often accompanied by challenging processes like multiple implants, oxide step etching, multiple etched mesas or grayscale lithography.
There is a need for improved termination structures and for methods for forming such termination structures.